In June 2017, yixin participated in the 2017 design automation conference (DAC 2017) held in Austin, USA. As a speaker, I will give a "pcie-based Enterprise SSD using AR uPs" report for Synopsys. Participated in the round-table seminar on "Hardware Emulation's variability" for Mentor's Hardware acceleration simulator as a guest expert.By Wednesday afternoon, the 54th Design Automation Conference was drawing to a close, with attendees leaving the Conference in search of unknown parts.
Mentor's booth on the exhibition floor showed a different scene when a discussion group called "simulation explosion of models used in different areas of the industry" was under way.I hosted a discussion on hardware emulation, a topic that is largely absent from DAC programs. My guests include Nasr Ullah, senior director of performance-power architecture at samsung, Bruce Cheng, senior staff engineer at Starblaze, the leading SSD company, and Robert Kaye, senior technology specialist at ARM. We discussed the simulation of data storage chip, system IP and embedded software.Rizzatti: I've been doing simulations for longer than I remember. Today we invited three experts from different industries to discuss simulations. Nasr, Bruce and Rob, please describe your company's design environment, the type of design, the complexity of the design, and some of the design validation and challenges you face every day.Ullah: at samsung's Austin research and development center (SARC), we produce microprocessors and critical system IP for the next generation of Galaxy phones. We design microprocessors, memory controllers and interconnect networks.Our overall design is divided into three stages. Firstly, we start from the development of architecture and the conceptual stage of micro-architecture. Then there's the RTL design and the design implementation through composition, and all the background stuff. Finally, when the silicon returns from the foundry, we check that the silicon meets our specifications.These three phases required us to be able to design something, make sure it was implemented correctly, and verify that silicon met our needs. Being able to tie all of this together is a major validation and simulation challenge that we have to deal with at every stage.At Starblaze, we designed the SSD controller chip. In SSD controller design, firmware defines most functions of SSD controller. The performance of the entire SSD controller depends on the correct interaction between the firmware and the hardware. The key to designing SSD controllers is to optimize the best firmware on the best hardware. This creates the basic problem of having to develop the firmware and hardware together before exiting. It is essential to establish strong and deep collaboration between the firmware and hardware development teams.Our verification environment includes generic verification methods (UVM) and hardware description language (HDL) emulation for block-level and some basic system-level validation. But we used emulation to ensure that the firmware worked on the system hardware before exiting.Kay: I'm part of ARM's development solutions team and I'm responsible for designing the software tools that we use during development.
As you may know, the arm develops a wide range of IP, central processing unit (CPU), graphics processing unit (GPU), video, interconnect, memory controller, and so on. We also develop reference platforms and system guidance platforms that we provide to our partners as references when they design their system chips (soc).I participate in simulation mainly from the perspective of software development, rather than from the perspective of verification environment.
We use simulation as an independent solution to speed up software validation. We also use emulation in hybrid environments, where we link abstract models to simulators and divide the design to focus simulation capabilities on specific types of tests.Rizzati: imitation has been around for over 30 years. Initially, it was used in an online simulation mode called ICE. Over the past decade, virtual deployment patterns (test environments made up of software models that drive chips inside emulators) have become popular. Virtual patterns open the door to several usage patterns. Which model do you use in your field and what are the benefits?
Ullah: in samsung's microprocessor development, we use simulation technology in three major areas. The first area is performance, which includes five sub-areas, which I will describe later. The second area is power, and the third area is workload characteristics.In terms of performance, my team makes all the performance predictions. Before we design a chip, we predict what it will do. We use emulation or a combination of emulation and emulation in mixed mode to validate our projections and make sure they are correct.Second, one of the biggest challenges in any design is to make sure that we can build things right and figure out what has to happen. When things are implemented, they change. We use emulation extensively to verify that our implementation meets the requirements we established when defining the architecture.The third aspect has to do with the tight design cycle, which is typical of smartphone design, as a new phone comes out every year. The problem is that when we have latency features that can't be implemented through the whole process, we have to figure out what we can implement. Emulation helps us quickly verify late features and decide if we can continue to use them.
